Design Rule Checking or Checks (DRC) is an area of Electronic Design Automation that determines whether the physical layout of a particular chip layout satisfies a series of recommended parameters called Design Rules. Design rule checking is a major step during physical verification signoff on the design.
Design Rules are a series of parameters provided by semiconductor manufacturers that enable the circuit designer to verify the correctness of a mask set. Design rules are generally specific to a particular semiconductor manufacturing process. A design rule set specifies certain geometric and connectivity restrictions to ensure sufficient margins to account for variability in semiconductor manufacturing processes, so as to ensure that most of the parts work correctly.
Often integrated circuits (e.g., memory circuits) will make use of multiple voltage domains. A higher voltage may be used for certain applications (e.g., access to the memory cells) and a lower voltage is used for the logic or control circuits. The bifurcation of voltage domains allows for a reduction in the power consumption and smaller transistors.
Generally, the bulk terminal (a.k.a. the “N-well” or “Body”) of a p-channel metal oxide semiconductor (MOS) (PMOS) transistor is connected to the same power supply as the PMOS's source terminal. For circuits with multiple voltage domains, this procedure can cause issues. For example, most DRC requires that the well-to-well spacing of circuits on different domains be rather large (e.g., to avoid electrical voltage discharge). Further electrical problems may occur if the bulk or body and the source terminal of a device are connected to different voltage supplies. For example, junction diodes may become forward biased and large unintended currents may occur.